1. Field of the Invention
The present invention relates to a multi-phase PSK signal decoder and, more particularly, to a multi-phase PSK signal decoder which decodes digital codes of a multi-phase PSK signal.
2. Description of the Prior Art
There has been proposed a four-phase PSK signal decoder which will hereunder be described with reference to FIG. 7.
The conventional four-phase PSK signal decoder comprises: first and second synchronous phase detecting means 2'-1 and 2'-2; first and second low-pass filter means 3'-1 and 3'-2; first and second sampling means 4-1 and 4-2; decoded digital code generating means 11'; sampling signal generating means 21'; signal generating means 41 and 43 for generating signals which are used to generate phase detecting signals; signal generating means 44 for generating a signal which is used to generate an oscillation control signal; low-pass filter means 42; and phase detecting reference signal generating means 51' and 46'.
The first and second synchronous phase detecting means 2'-1 and 2'-2 are supplied with a common four-phase PSK signal SO and first and second phase detecting reference signals SR'-1 and SR'-2 available from the phase detecting reference signal generating means 46' and output first and second synchronous-phase-detected signals SD'-1 and SD'-2 synchronously detected by first and second phase detecting reference signals SR'-1 and SD'-2 of the phase of the carrier of the four-phase PSK signal SO.
The first synchronous phase detecting means 2'-1 has the function of a multiplier which is supplied with the four-phase PSK signal SO and the first phase detecting reference signal SR'-1. Similarly, the second synchronous phase detecting means 2'-2 has the function of a multiplier which is supplied with the four-phase PSK signal SO and the second phase detecting reference signal SR'-2.
Assuming, for the sake of brevity, that the initial phase of its carrier is zero, the four-phase PSK signal SO is generally expressed by the following equation. EQU SO=A cos (.omega.t+.theta.(t))+n(t) (101)
where A is the amplitude, .omega. the angular frequency of the carrier, t time, .theta.(t) the phase of the code (the symbol) representing communication information at time t and n(t) noise at time t.
The first and second phase detecting reference signals SR'-1 and SR'-2 are generally expressed by Eqs. (103-1) and (103-2) described later on.
The first and second synchronous phase detecting signals SD'-1 and SD'-2 are generally expressed by Eqs. (104-1) and (104-2) on the basis of Eqs. (101), (103-1) and (103-2). EQU SD'-1=A{ cos (.DELTA..omega.t-.epsilon..sub.a +.theta.(t))-cos (2.omega.t+.DELTA..omega.t+.epsilon..sub.a +.theta.(t))}+n(t) cos (.omega.t+.epsilon..sub.a) (104-1) EQU SD'-2=A{ sin (.DELTA..omega.t-.epsilon..sub.a +.theta.(t))-sin (2.omega.t+.DELTA..omega.t-.epsilon..sub.a +.theta.(t))}+n(t) sin (.omega.t+.epsilon..sub.a) (104-2)
In Eqs. (104-1) and (104-2), .DELTA..omega. is expressed by the difference between the angular frequency .omega. of the carrier of the four-phase PSK signal SO and angular frequencies of the first and second phase detecting reference signals SR'-1 and SR'-2. .epsilon..sub.a is error phase and n (t) is noise at time t. For the sake of brevity, Eqs. (104-1) and (104-2) are shown to be common in that the amplitude in the right-hand first term is A, that the amplitude in the right-hand second term is n (t) and that the error phase .epsilon..sub.a on the right-hand side is the same.
The first and second low-pass filter means 3'-1 and 3'-2 generate third and fourth synchronous phase detecting signals SD'-3 and SD'-4 composed of low-frequency components of the first and second synchronous phase detecting signals SD'-1 and SD'-2, respectively.
Letting noises that are generated in the first and second low-pass filter means 3'-1 and 3'-2 at time t are represented by n.sub.a and n.sub.a, respectively, for the sake of brevity, the third and fourth synchronous phase detecting signals SD'-3 and SD'-4 are expressed, in general, by the following equations. EQU SD'-3=A cos (.DELTA..omega.t-.epsilon..sub.a +.theta.(t))+n.sub.a (t)(106-1) EQU SD'-4=A sin (.DELTA..omega.t-.epsilon..sub.a +.theta.(t))+n.sub.a '(t)(106-2)
In the interest of simplicity, Eqs. (106-1) and (106-2) are shown to be common in that the amplitude on the right-hand first term is A.
The first and second sampling means 4'-1 and 4'-2 generate fifth and sixth synchronous phase detecting signals SD'-5 and SD'-6 by sampling the third and fourth synchronous phase detecting signals SD'-3 and SD'-4 with a sampling signal SM' which is generated by the sampling signal generating means 21'.
The sampling signal SM' is expressed by Eq. (113) described later
The synchronous phase detecting signals SD'-5 and SD'-6 are expressed, in general, by the following equations: EQU SD'-5=A cos (.DELTA..omega.h-.epsilon..sub.a (h)+.theta.(h))+n.sub.a (h)(107-1) EQU SD'-6=A sin (.DELTA..omega.h-.epsilon..sub.a (h)+.theta.(h))+n.sub.a '(h)(107-2)
Letting the standard sampling period of the sampling signal SM' be represented by .DELTA.T, letting integers 1,2, . . . in a value obtained with t/.DELTA.T be represented by k, and letting i be represented by 0, 1, 2, . . . k, letting error phase at i.multidot..DELTA.T be represented by .epsilon..sub.c (i), for the sake of brevity, h is expressed, in general, by following equation. EQU h=i.multidot..DELTA.T+.epsilon..sub.c (i) (108)
Incidentally, for the sake of brevity, Eqs. (107-1) and (107-2) are shown to be common in that the amplitude on the right hand first term is A.
The decoded digital code generating means 11' generates, from the fifth and sixth synchronous phase detecting signals SD'-5 and SD'-6, a decoded digital code SC' which represents the digital code of the four-phase PSK signal SO.
The decoded digital code SC' represents such codes (two-bit in this example) as shown in the column SC' in the following table 1 which depend, in combination, on whether the fifth synchronous phase detecting signal SD'-5 takes a value equal to or greater than 0 (SD'-5.gtoreq.0) or smaller than 0 (SD'-5&lt;0) and whether the sixth synchronous phase detecting signal SD'-6 takes a value equal to or greater than 0 (SD'-6.gtoreq.0) or smaller than 0 (SD'-6&lt;0).
TABLE 1 ______________________________________ SD'-5 SD'-6 SC ______________________________________ &lt;0 &lt;0 00 &lt;0 .gtoreq.0 01 .gtoreq.0 &lt;0 10 .gtoreq.0 .gtoreq.0 11 ______________________________________
The sampling signal generating means 21' derives, as the above-mentioned sampling signal SM', a timing signal synchronized with the timing of a code (a symbol) representing communication information of the four-phase PSK signal SO, from either one or both (in FIG. 7, both) of the third and fourth synchronous phase detecting signals SD'-3 and SD'-4.
The sampling signal SM' is generally expressed by the following equation: ##EQU1## where .delta.[t-i.multidot..DELTA.T.epsilon..sub.c (i)] takes a value "1" only when [t-i.multidot..DELTA.T-.epsilon..sub.c (i)]=0 and a value "0" in the other cases.
The signal generating means 41 has the function of a voltage control oscillator controlled by an oscillation control signal SG from the low-pass filter means 42 and which generates a signal of the controlled oscillation frequency as a signal SK-1 which is used to generate a first phase detecting reference signal.
The signal SK-1 is generally expressed by the following equation: EQU SK-1=A.sub.e sin 4(.omega.+.DELTA..omega.)t (115)
where A.sub.e is amplitude.
The signal generating means 43 derives, from the four-phase PSK signal SO, a signal of an angular frequency 4.omega. four times higher than the angular frequency .omega. of its carrier as a signal SK-2 which is used to generate a second phase detecting reference signal.
Letting its amplitude be represented by A.sub.d and assuming that its initial phase is 0, the signal SK-2 is generally given by the following equation: EQU SK-2=A.sub.d cos 4.omega.t (116)
The signal generating means 44 generates a signal phase-detected by the signals SK-1 and SK-2 as a signal SB for oscillation control signal generation use.
The signal generating means 44 has the function of a multiplier which is supplied with the signal SK-1 for first phase detecting reference signal generation use and the signal SK-2 for second phase detecting reference signal generation use.
The signal SB is generally given by the following equation: EQU SB=A.sub.f sin 4.DELTA..omega. (117)
where A.sub.f is its amplitude.
The low-pass filter means 42 generates the afore-mentioned oscillation control signal SG composed of the low-frequency component of the signal SB from the signal generating means 44.
The phase detecting reference signal generating means 51' derives from the signal SK-1 a reference signal SR'-0 of an angular frequency (.omega.+.DELTA..omega.) which is a quarter of its angular frequency 4(.omega.+.DELTA..omega.).
The reference signal SR'-0 is generally given by the following equation: EQU SR'-0=A.sub.h sin (.omega.+.DELTA..omega.)t (102)
where A.sub.h is its amplitude.
The phase detecting reference signal generating means 46' generates a signal of the same angular frequency (.omega.+.DELTA..omega.) as that of the reference signal SR'-0 and a signal displaced therefrom .pi./2 apart in phase, as the second and first phase detecting reference signals SR'-1 and SR'-2, respectively.
The phase detecting reference signal generating means 46' has a function of outputting the reference signal SR'-0 intact as the second phase detecting reference signal SR'-2 and a function of shifting the phase of the reference signal SR'-0 by .pi./2 and outputting the thus phase-shifted signal as the first phase detecting reference signal SR'-1.
The first and second phase detecting reference signals SR'-1 and SR'-2 are generally given by the following equations: EQU SR'-1=A.sub.h cos (.omega.+.DELTA..omega.)t (103-1) EQU SR'-2=A.sub.h sin (.omega.+.DELTA..omega.)t(103-2)
With the conventional four-phase PSK signal decoder described above, the signal generating means 41, which generates the signal SK-1 for producing the first and second phase detecting reference signals SR'-1 and SR'-2 which are applied to the first and second synchronous phase detecting means 2'-1 and 2'-2, respectively, is controlled by the oscillation control signal SG which is derived by the low-pass filter means 42 from the signal SB available from the signal generating means 44. Hence, what is called a PLL (Phase Locked Loop) configuration is formed; in the steady state of the four-phase PSK signal SO, the decoded digital code SC' by the decoded digital code generating means 11' can stably be obtained without a code error.
With the prior art four-phase PSK signal decoder of FIG. 7, it is possible to lessen the influence of noise (expressed by n(t) on the right hand second term of Eq. (101)) contained in the four-phase PSK signal SO with a decrease in the bandwidth of the low-pass filter means 42 which generates the oscillation control signal SG for controlling the signal generating means 41'. In this instance, however, much time is needed for initial carrier synchronization. Furthermore, when the angular frequency .omega. of the carrier of the four-phase PSK signal SO fluctuates by the Doppler effect as in the case of an orbiting satellite, the angular frequencies (.omega.+.DELTA..omega.) of the phase detecting reference signals SR'-1 and SR'-2 cannot precisely follow the fluctuating angular frequency .omega., sometimes leading to a failure in providing the decoded digital code SC'.
The larger the bandwidth of the low-pass filter means 42 is, the more the above-mentioned follow-up property increases. In this instance, however, a code error is induced in the decoded digital code SC' by the influence of noise (n(t)) contained in the four-phase PSK signal SO.